New-Tech Europe | July 2018

the only simple option was to monitor waveforms at the package plane, which clearly has limitations due to the package parasitic effects. (Negation of the parasitic network was feasible, but only if topology and component values are known and their electrical impact removed through de-embedding during simulation). Although care had been taken to control the second harmonic load impedance, analysis of the waveforms, as shown in Figure 3, showed that third harmonic impedance was very favorable without further optimization. These waveforms showed a peak voltage of <60 V and a peak current of <1500 mA at 1500 MHz, which were well within device ratings. What was more instructive in terms of the efficiency performance was the near-ideal Class F operation with the half-wave rectified current waveform exactly 180 ̊ out of phase with the voltage waveform and very little voltage/current overlap. Using a DLL (dynamic load line) analysis, the waveform was defined as three regions; Region A where Vmin and Imax, Region B where Vmax and Imin, and the transition region. Using this technique, the waveform was controlled successfully. Calculating over one period, it was found that the waveform remained in Region A or B for 63.8 percent of the time and the transition occupied only 36.2 percent. RFPA Validation To validate the approach and its accuracy, the RFPA was fabricated on Rogers 4350B 20 mil dielectric (εr = 3.48). The circuit was mounted on a jig consisting of 3 pieces containing: the source network (INMAT), load network (OUTMAT), and a copper center section to mount the device which was required to have its

Figure 3a: DLL using intrinsic V and I nodes at 1500 MHz CW stimulus. Regions A, B, and transition defined.

Figure 3b: Intrinsic V and I waveforms using the same nodes with corresponding regions defined in shaded area. Power output is 10W

Waveform Engineering Waveform engineering [5] was also used to analyze the RFPA, using both the load-pull tuner and, more critically, the realized load network. Recent device models giving access to the voltage and current nodes at the intrinsic current generator plane allow accurate observation of both the V and I waveforms, as well as the dynamic load line (DLL), for analysis of clipping and the RFPA mode of operation, as well as the peak voltages and currents generated. Prior to these nodes being available,

positive slope, or equalization, can conveniently be introduced in the source matching circuit. Stability of the RFPA was achieved using a shunt connected series R – C pair adjacent to the input port followed by a series R. Although this was quite a severe approach, analysis showed the transistor to be potentially unstable in the operating band and therefore some gain was sacrificed in order to obtain unconditional stability from 1 MHz to >6 GHz where the transistor ceased to have gain (Fmax).

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