New-Tech Europe Magazine | July 2017

Figure 3: The Mentor/IXIA integration removes all gaps in a validation environment from simulation to emulation to the lab

creating high-performance optimized dataplane flow from an IXIA test platform to emulation. The overall solution fills the gap between simulation, emulation and the lab for greater efficiency and improved debug. The partnership between Mentor Graphics and IXIA offers networking customers the ability to seamlessly integrate an IXIA virtual environment into an emulation-based verification flow, bringing the powerful advantages of emulation to the lab environment. This allows the reuse a

product family as the emulation test front-end with a new Mentor Veloce Virtual Network (VN) App as the back- end. The front-end, called IxVerify is based on IXIA’s IxNetworkVE test products, uses the same GUI and enables reuse of test scripts and functionality. In fact, the customer experience is undifferentiated from what IXIA customer observe today. VN App serves as the back- end and includes a Veloce Flow Control mechanism running on the workstation and a transactor mapped inside the Veloce emulator,

of traffic flow generation scripts for greater efficiency and improved debug, faster time-to-market, and gives design teams the ability to de- risk the challenges of complex chip designs. A real shift-left in pre-silicon verification using a post-silicon software development kit (SDK) and test environment is finally within reach. De-risking complex networking SoC development is not a remote objective anymore. Rather it is available to all design teams today.

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